Bindings for HyperBus Memory Controller (HBMC) on TI's K3 family of SoCs

Required properties:
- compatible : "ti,am654-hbmc" for AM654 SoC
- reg : Two entries:
	First entry pointed to the register space of HBMC controller
	Second entry pointing to the memory map region dedicated for
	MMIO access to attached flash devices
- ranges : Address translation from offset within CS to allocated MMIO
	   space in SoC

Optional properties:
- mux-controls : phandle to the multiplexer that controls selection of
		 HBMC vs OSPI inside Flash SubSystem (FSS). Default is OSPI,
		 if property is absent.
		 See Documentation/devicetree/bindings/mux/reg-mux.txt
		 for mmio-mux binding details

Example:

	system-controller@47000000 {
		compatible = "syscon", "simple-mfd";
		reg = <0x0 0x47000000 0x0 0x100>;
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		hbmc_mux: multiplexer {
			compatible = "mmio-mux";
			#mux-control-cells = <1>;
			mux-reg-masks = <0x4 0x2>; /* 0: reg 0x4, bit 1 */
		};
	};

	hbmc: hyperbus@47034000 {
		compatible = "ti,am654-hbmc";
		reg = <0x0 0x47034000 0x0 0x100>,
			<0x5 0x00000000 0x1 0x0000000>;
		power-domains = <&k3_pds 55>;
		#address-cells = <2>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x5 0x00000000 0x4000000>, /* CS0 - 64MB */
			 <0x1 0x0 0x5 0x04000000 0x4000000>; /* CS1 - 64MB */
		mux-controls = <&hbmc_mux 0>;

		/* Slave flash node */
		flash@0,0 {
			compatible = "cypress,hyperflash", "cfi-flash";
			reg = <0x0 0x0 0x4000000>;
		};
	};
