Qualcomm Graphics Clock & Reset Controller Binding
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Required properties :
- compatible : shall contain "qcom,sdm845-gpucc" or "qcom,msm8998-gpucc"
- reg : shall contain base register location and length
- #clock-cells : from common clock binding, shall contain 1
- #reset-cells : from common reset binding, shall contain 1
- #power-domain-cells : from generic power domain binding, shall contain 1
- clocks : shall contain the XO clock
	   shall contain the gpll0 out main clock (msm8998)
- clock-names : shall be "xo"
		shall be "gpll0" (msm8998)

Example:
	gpucc: clock-controller@5090000 {
		compatible = "qcom,sdm845-gpucc";
		reg = <0x5090000 0x9000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		#power-domain-cells = <1>;
		clocks = <&rpmhcc RPMH_CXO_CLK>;
		clock-names = "xo";
	};
