Samsung Exynos Analog to Digital Converter bindings

The devicetree bindings are for the new ADC driver written for
Exynos4 and upward SoCs from Samsung.

New driver handles the following
1. Supports ADC IF found on EXYNOS4412/EXYNOS5250
   and future SoCs from Samsung
2. Add ADC driver under iio/adc framework
3. Also adds the Documentation for device tree bindings

Required properties:
- compatible:		Must be "samsung,exynos-adc-v1"
				for exynos4412/5250 and s5pv210 controllers.
			Must be "samsung,exynos-adc-v2" for
				future controllers.
			Must be "samsung,exynos3250-adc" for
				controllers compatible with ADC of Exynos3250.
			Must be "samsung,exynos7-adc" for
				the ADC in Exynos7 and compatibles
			Must be "samsung,s3c2410-adc" for
				the ADC in s3c2410 and compatibles
			Must be "samsung,s3c2416-adc" for
				the ADC in s3c2416 and compatibles
			Must be "samsung,s3c2440-adc" for
				the ADC in s3c2440 and compatibles
			Must be "samsung,s3c2443-adc" for
				the ADC in s3c2443 and compatibles
			Must be "samsung,s3c6410-adc" for
				the ADC in s3c6410 and compatibles
- reg:			List of ADC register address range
			- The base address and range of ADC register
			- The base address and range of ADC_PHY register (every
			  SoC except for s3c24xx/s3c64xx ADC)
- interrupts: 		Contains the interrupt information for the timer. The
			format is being dependent on which interrupt controller
			the Samsung device uses.
- #io-channel-cells = <1>; As ADC has multiple outputs
- clocks		From common clock bindings: handles to clocks specified
			in "clock-names" property, in the same order.
- clock-names		From common clock bindings: list of clock input names
			used by ADC block:
			- "adc" : ADC bus clock
			- "sclk" : ADC special clock (only for Exynos3250 and
				   compatible ADC block)
- vdd-supply		VDD input supply.

- samsung,syscon-phandle Contains the PMU system controller node
			(To access the ADC_PHY register on Exynos5250/5420/5800/3250)

Note: child nodes can be added for auto probing from device tree.

Example: adding device info in dtsi file

adc: adc@12D10000 {
	compatible = "samsung,exynos-adc-v1";
	reg = <0x12D10000 0x100>;
	interrupts = <0 106 0>;
	#io-channel-cells = <1>;
	io-channel-ranges;

	clocks = <&clock 303>;
	clock-names = "adc";

	vdd-supply = <&buck5_reg>;
	samsung,syscon-phandle = <&pmu_system_controller>;
};

Example: adding device info in dtsi file for Exynos3250 with additional sclk

adc: adc@126C0000 {
	compatible = "samsung,exynos3250-adc", "samsung,exynos-adc-v2;
	reg = <0x126C0000 0x100>;
	interrupts = <0 137 0>;
	#io-channel-cells = <1>;
	io-channel-ranges;

	clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
	clock-names = "adc", "sclk";

	vdd-supply = <&buck5_reg>;
	samsung,syscon-phandle = <&pmu_system_controller>;
};

Example: Adding child nodes in dts file

adc@12D10000 {

	/* NTC thermistor is a hwmon device */
	ncp15wb473@0 {
		compatible = "murata,ncp15wb473";
		pullup-uv = <1800000>;
		pullup-ohm = <47000>;
		pulldown-ohm = <0>;
		io-channels = <&adc 4>;
	};
};

Note: Does not apply to ADC driver under arch/arm/plat-samsung/
Note: The child node can be added under the adc node or separately.
